Impact of Device Parameters on the Reliability of the Magnetic Tunnel Junction Based Implication Logic Gates

Non-volatile logic is a promising solution to overcome the leakage power issue in the off-state [1], which has become an important obstacle to scaling of CMOS technology. Magnetic tunnel junction (MTJ)-based logic has a great potential, because of the non-volatility, unlimited endurance, CMOS compatibility, and fast switching speed of the MTJ devices [2]. In our previous work [3], we have shown the realization of an intrinsic logic-in-memory architecture (also known as Stateful Logic) via material implication (IMP) (Fig. 1a), for which the MTJ devices are used simultaneously as memory elements and computing elements (logic gates). Therefore, MTJ-based IMP logic reduces the device counts by eliminating the need for CMOS-based logic elements. This is the advantage of the Stateful Logic compared to the common logicin-memory architectures, where MTJs are used as ancillary devices for storing binary data and, therefore, the intermediate circuitry and sensing amplifiers [4] are still required. Here we study the impact of the MTJ device parameters on the reliability of the MTJ-based IMP logic gate (Fig. 1b).